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Ph.D. position: Circuit design of small-scale fusion and generic classification unit for smart sens

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Français - Anglais

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General information

Reference : UMR8520-FRELEF-039
Workplace : LILLE
Date of publication : Thursday, November 07, 2019
Scientific Responsible name : Antoine FRAPPE
Type of Contract : PhD Student contract / Thesis offer
Contract Period : 36 months
Start date of the thesis : 1 March 2020
Proportion of work : Full time
Remuneration : 2 135,00 € gross monthly

Description of the thesis topic

In the context of distributed sensors in body area networks, the growing number of sensors communicating with each other generates lots of data to process. Moreover, the major part of the produced data is periodically updated but does not represent new information, which is not relevant to be processed. To address this problem and limit the communication the others, a sensor is bound to become “smarter” and to embed intelligence to sort the information flow. Smart nodes embedding near-sensor processing and machine learning open therefore the following perspectives:
• Extract meaningful and contextual information from the fusion of sensor signals;
• React only when new information is present at the input;
• Reduce considerably the communication overhead, thus improving the system efficiency;
• Enhance privacy using local signal conditioning.
Differentiating from centralized and energy-consuming machine learning algorithms, typically in the cloud, edge computing for body area networks aims to integrate efficient small-scale sensor fusion and classification engine into energy-limited sensor nodes.

This Ph.D. targets the study and design of integrated systems for near-sensor small-scale fusion and classification unit using neuro-inspired architectures, such as clique-based networks, long short-term memories or binarized neural networks. The final objective of this work is to design a groundbreaking integrated circuit to demonstrate the integration of AI concepts directly at the sensor level, to be applied for various types of sensors (audio, biomedical, automotive, etc.).

The following tasks will be envisioned:
• Study and modeling of various architectures of neural networks (clique-based networks, long short-term memories or binarized neural networks, etc.);
• Hardware demonstration of sensor fusion on an embedded platform (such as FPGA, microcontroller or mixed System-on-Chip);
• Circuit design and measurements at transistor level in advanced CMOS technology process.

Potential candidates are expected to:
• Have earned the Master diploma in the field of electronics, or equivalent;
• Have expertise in high-level modeling tools or languages (Matlab, Simulink, Verilog-AMS, HDL, C, etc.), knowledge about circuit design using Cadence suite is a plus;
• Be proficient in English (oral and written);
• Have the capability to work in autonomy and take initiatives;
• Team work.

Work Context

The Ph.D. work will be conducted in the Integrated Circuit Design Group at IEMN in Lille, France, in collaboration with STMicroelectronics. The research team has built competencies in low-power design for energy-efficient and integrated machine learning in advanced CMOS technologies for several years. The team is also conducting state-of-the-art national projects in the field of “Near-sensor computing”.

Constraints and risks

Short trips in France and abroad are expected.

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