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Portail > Offres > Offre UMR5270-SYLGON-058 - Postdoctorant (H/F) Méthodes et outils DTCO pour l’exploration de l'espace de conception de circuits de calcul ferroélectriques

Postdoctoral Researcher (M/F): DTCO Methods and Tools for Design Space Exploration of Ferroelectric Computing Circuits

This offer is available in the following languages:
- Français-- Anglais

Date Limite Candidature : mercredi 23 juillet 2025 23:59:00 heure de Paris

Assurez-vous que votre profil candidat soit correctement renseigné avant de postuler

Informations générales

Intitulé de l'offre : Postdoctoral Researcher (M/F): DTCO Methods and Tools for Design Space Exploration of Ferroelectric Computing Circuits (H/F)
Référence : UMR5270-SYLGON-058
Nombre de Postes : 1
Lieu de travail : ECULLY
Date de publication : mercredi 2 juillet 2025
Type de contrat : Chercheur en contrat CDD
Durée du contrat : 24 mois
Date d'embauche prévue : 1 octobre 2025
Quotité de travail : Complet
Rémunération : From 3021,50 Euros gross per month, depending on experience
Niveau d'études souhaité : Doctorat
Expérience souhaitée : Indifférent
Section(s) CN : 08 - Micro et nanotechnologies, micro et nanosystèmes, photonique, électronique, électromagnétisme, énergie électrique

Missions

The objective of the postdoctoral project will be to explore circuit-technology co-optimization (DTCO) approaches for next-generation memory bitcells and computing circuits based on ferroelectric materials. This project will focus on the use of physics-based compact models as well as system-level optimization and simulation tools to analyze critical trade-offs in terms of performance, endurance, and reliability of ferroelectric devices.

Activités

The recruited postdoctoral researcher will develop and apply DTCO methodologies in order to:
- Model the behavior of ferroelectric bitcells using Verilog-A compact models (e.g., calibrated HZO FeCap/FeMFET models) that incorporate partial polarization switching, thermal effects, and variability (Monte Carlo analyses)
- Quantify system-level trade-offs in ferroelectric near-memory computing architectures, including:
o Endurance-speed limitations
o Voltage-time dynamics of polarization switching
o Programming energy versus memory window optimization
- Co-optimize device-circuit interactions through array-level simulations to assess model convergence, parasitic effects, and performance-power-area metrics
More broadly, this work will contribute to the enhancement of the open-source DTCO ecosystem via the CHOOSE platform of the PEPR Électronique initiative. The recruited researcher will participate in coordination meetings with partners from the PEPR Électronique-FerroFutures project and will contribute to the dissemination and visibility of the project through publications in international journals and conferences. They may also be involved in supervising PhD students and/or Master-level interns.

Compétences

The selected candidate must hold a PhD in microelectronics or a related field, and demonstrate proven experience in at least one of the following fields:
- Design and simulation of microelectronic circuits (Verilog-A implementation, use of SPICE-type electrical simulation tools)
- Statistical and dynamic analysis of variability
- Development or use of DTCO/STCO methods and tools applied to memory or logic technologies

Contexte de travail

The Institut des Nanotechnologies de Lyon (INL) aims to develop multidisciplinary technological research in the field of micro and nanotechnologies and their applications. The research carried out ranges from materials to systems. The laboratory is supported by Lyon's NanoLyon technology platform.
The areas of application cover major economic sectors: the semiconductor industry, information technologies, life and health technologies, energy and the environment.
The laboratory is multi-site, with locations on the Ecully and Lyon-Tech La Doua campuses. It employs around 230 people, including 121 permanent staff. The INL is a major player in the Research and Teaching Cluster.
This position is located in an innovative environment, at the cutting edge of future technologies, in strategic application sectors.

Le poste se situe dans un secteur relevant de la protection du potentiel scientifique et technique (PPST), et nécessite donc, conformément à la réglementation, que votre arrivée soit autorisée par l'autorité compétente du MESR.