Description of the thesis topic

This open PhD position is funded by a French collaborative research project DIAMSHIELD on the use of diamond transistors in smart grids. This project has started in 2025, for 39 months, coordinated by DIAMFAB, with Laplace lab and Schneider Electric company as participants. This PhD position is funded for 36 months. The DIAMSHIELD project aims at developing a new generation of efficient field effect transistors (FET) based on diamond semiconductor, with unique properties in smart grid applications. Technologies for advanced power electronics are at the heart of the next generation of energy systems. Silicon is a well-established semiconductor material that has addressed the requirements of energy conversion for more than 50 years. However, it is widely recognized that a real step-improvement in Power Electronics will be obtained by employing devices based on wide bandgap semiconductor materials. Wide bandgap semiconductor materials have superior electrical characteristics for power devices when compared to silicon. Power electronic devices based on wide bandgap semiconductors will result in substantial improvements in the performance of power electronics systems by offering higher blocking voltages, improved efficiency and reliability (higher performance/cost ratio), as well as reduced thermal requirements thus leading to the realization of more efficient green electronic systems. Among these materials, diamond, classified as ultra-wide bandgap due to its huge energy bandgap (5.5 eV), is considered to be the ultimate semiconductor for applications in high power electronics [1] due to its exceptional properties. Its dielectric breakdown strength is 3 times higher than in silicon carbide (SiC) or gallium nitride (GaN) and more than 30 times better than in silicon (Si), whereas the specific on-state resistance is inversely proportional to the cubic of this parameter. In addition, the carrier mobility is very high for both carrier types and the thermal conductivity is unsurpassed.

The scientific objectives of this PhD position are summarized in two key tasks: to design the diamond power transistors and its associated electrical and optical gate driver, to characterize such power devices in power commutation cells, dedicated experimental tests and characterization in relation to the final application.
Design of Diamond transistor
In a close relationship within the project consortium, the different devices will be investigated using 1D, 2D, 3D Finite Element Analyses (e.g. TCAD Sentaurus, Silvaco). The numerical analyses will assess the compromises between electrical performances (ON state resistance, Threshold Voltage, transconductance and Breakdown Voltage), fabrication parameters (diamond layers thicknesses and doping levels, oxide type and thickness, lithography and fabrication steps) and geometrical parameters (e.g. Gate length, gate to drain and gate to source distances, critical dimensions and safety margins). A specific focus on parasitic capacitors will be conducted to assess as early as possible the switching performances and best compromises between transistor parameters, conduction and switching losses. The different architectures will be benchmarked both in terms of electrical performances (ON state resistance, electric fields in OFF state) and fabrication complexity (number of fabrication processes and tolerance with dispersions). The best architectures will be designed (mask layout), in a strong collaboration with the partners in Toulouse and Grenoble.
Implementation of Diamond transistor with its dedicated driver – Design of dedicated test benches
The proposed new diamond transistor architectures will have some specificities such as non-typical Threshold Voltage (Vth) values, possibly small total area and large internal gate resistor. These specificities will require the design and development of new characterization techniques, especially in the context of transient behavior, pre and post conditioning. The large switching behavior of diamond FETs must then be explored experimentally. Dedicated “evaluation boards” will be designed to measure switching waveforms during large signal switching (e.g. 600V,1A), in a close relationship with packaging tasks, gate drivers and transistor specifications. Switching loss energies (i.e. Eoff, Eon) will be experimentally measured with a dedicated methodology as a function of the obtained electrical properties (and consequent current, voltage ratings, voltage and current switching speeds) and combination electrical control signals and parameters. The outstanding DC and AC performances of the novel diamond transistors will be quantified, and benchmarked with other technologies such as SiC MOSFETs and/or SiC JFETs.

Work Context

This position is funded by a French collaborative research project “DIAMSHIELD”: This PhD student position is funded for 36 months.

Laplace (Plasma and Energy Conversion Laboratory) is a UMR supervised by the CNRS, INP-Toulouse and UPS. The laboratory has more than 300 people and represents the highest concentration of research in electrical engineering and Plasma in France. In particular, it is the only one to cover the "Plasma/materials/systems" continuum in an integrated manner. The CS group is composed of 35 full-time equivalents, and the main investigations focus on original concepts of associations of nested, superimposed and/or magnetically coupled switching cells in parallel, giving rise to complex circuits with often very branched topology. The research and technologies thus developed address both new energy management functionalities and high-performance applications in terms of waveform quality, compact filtering and three-dimensional integration with high specific power.

The position is located in a sector under the protection of scientific and technical potential (PPST), and therefore requires, in accordance with the regulations, that your arrival is authorized by the competent authority of the MESR.

Additional Information

- Graduated with a Master's degree in electrical engineering (with power electronics and/or microelectronics). Students with a strong background in applied physics are also encouraged to apply.
- master simulation tools such as SPICE, VHDL(-AMS), Cadence, as well as calculation and modeling tools such as Matlab/Octave or Python. Skills in numerical simulation of finite elements will be a plus (e.g. Comsol, TCAD, Silvaco).
- master the issues and methodologies of characterization of transistors in large signal switching regime.
- have in-depth knowledge in electronics, ideally in the modeling of transistors and power components with large gap and/or ultra-large gap materials.
- have a good level and mastery of the French and English languages