Description du sujet de thèse

The growing need for information processing at the edge for low latency, high speeds and energy efficiency goals, leveraging edge computing as well as IoT devices (75 billion expected by 2025) for data collection and processing, requires more robust and reliable security layers to guarantee hardware integrity and information security. Security layers are a fundamental part of our hardware and digital infrastructure, and perform several essential functions, such as ensuring that a hardware subsystem is not counterfeited, that a client has authentication rights on a server, or that the data generated/processed comes from an uncorrupted gas pedal. Counterfeiting poses a serious threat to the security of large-scale systems based on the integration of several subsystems. For example, counterfeit chips have been discovered in ballistic missiles and fighter aircraft. Furthermore, the massive exchange of sensitive data in the context of edge computing for applications such as autonomous driving, requires that pitfalls are not exploited by an attacker to compromise the security of the platform.
The aim of this work will be to develop new security layers that do not rely on the physical storage of a digital secret key in memory, potentially accessible by exploiting software or hardware vulnerabilities. Physical non-clonable functions (PUFs) represent a recent class of security layers that can be used for applications in cryptography, for example, end-to-end encryption, blockchain, secure data storage, etc. Manufacturing tolerances in CMOS platforms guarantee the inherently non-clonable nature of PUFs and contribute to the complexity of their behavior for well-designed architectures.
Although electronic PUFs are currently predominant, they have been shown to be vulnerable to machine learning attacks. Conversely, photonic PUFs have demonstrated increased resistance to machine learning attacks due to their richer responses and a greater number of physical quantities for key generation, e.g. phase, amplitude, polarization, as well as superior stability and multiple implementations of optical nonlinearities.
As part of the Horizon Europe research project NEUROPULS (NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS), INL's Engineering and Conversion of Light (i-LUM) group aims to develop new silicon photonic PUFs for hardware integrity and information security. This work will enable INL and other consortium partners involved in security tasks to explore various security protocols at prototype level (photonic chips will be manufactured by CEA-LETI on a world-unique silicon photonic platform with monolithically integrated III-V and phase-change materials) for next-generation hardware gas pedals based on photonic neuromorphic architectures interfaced with RISC-V core processors to target advanced computing applications.

Activities
The aim of this thesis is to explore new implementations of photonic PUFs based on CMOS-compatible Silicon Photonics approaches for applications in hardware integrity (identification) and information security (secure authentication, data signing, encryption...).
Work will include (i) exploration of various photonic architectures using system-level simulations, taking into account the role of manufacturing tolerances on device modeling, (ii) experimental performance evaluation of prototypes (manufacturing carried out by CEA-LETI), (iii) experimental analysis in terms of robustness and reliability, using techniques well known to the PUF and reliability communities, and (iv) proposal of new device/system designs and strategies for building more robust and reliable PUFs. The work will include behavioral and system-level modeling of photonic devices and architectures, robustness and reliability analysis of the designed architectures, and proposal of new design and system-level solutions.

Skills
You have or are about to obtain an MSc in electronics or physics engineering, with strong experience in at least one of the following areas: analog/digital/photonic integrated circuit design, multidisciplinary modeling or at least one of the following fields: design of photonic architectures, analysis of the robustness and reliability of designed architectures, proposal of new solutions at design and system level.

Contexte de travail

We expect you to be able to work both independently and in collaboration with the research team.
The Institute of Microelectronics Electromagnetism and Photonics and the Laboratory of Microwave and Characterization (IMEP-LAHC) form a Joint Research Unit "UMR 5130" (CNRS / Grenoble INP / UGA/ Université SAVOIE Mont-Blanc) with a staff of 110.
The laboratory is located on two sites: Grenoble (38) and Le Bourget du Lac (73), 70 km apart.
You will be based at the IMEP-LaHC site in Grenoble, within the PHOTO team which has a strong expertise in integrated photonics.
The position is located in an area covered by the protection of scientific and technical potential (PPST), and therefore requires, in accordance with regulations, that your arrival be authorized by the competent MESR authority.

Le poste se situe dans un secteur relevant de la protection du potentiel scientifique et technique (PPST), et nécessite donc, conformément à la réglementation, que votre arrivée soit autorisée par l'autorité compétente du MESR.

Contraintes et risques

Nil