En poursuivant votre navigation sur ce site, vous acceptez le dépôt de cookies dans votre navigateur. (En savoir plus)
Portail > Offres > Offre UMR8029-DENLAB-001 - Switch thermique intégré sur puce de puissance (H/F)

Integrated Thermal Switch on Power Chip (H / F)

This offer is available in the following languages:
Français - Anglais

Assurez-vous que votre profil candidat soit correctement renseigné avant de postuler. Les informations de votre profil complètent celles associées à chaque candidature. Afin d’augmenter votre visibilité sur notre Portail Emploi et ainsi permettre aux recruteurs de consulter votre profil candidat, vous avez la possibilité de déposer votre CV dans notre CVThèque en un clic !

Faites connaître cette offre !

General information

Reference : UMR8029-DENLAB-001
Workplace : CACHAN
Date of publication : Wednesday, January 30, 2019
Type of Contract : FTC Scientist
Contract Period : 12 months
Expected date of employment : 20 February 2019
Proportion of work : Full time
Remuneration : Between 2500 and 3200 € gross monthly according to experience
Desired level of education : 5-year university degree
Experience required : Indifferent


Robustness of the power semiconductors is a subject of growing interest. Controlling their failure mode is a lesser known subject but very important to intrinsically secure embedded power systems. Most semiconductors present a short-circuit fault mode between the main electrodes (drain-source), which is obviously a severe obstacle to securing the applications. This subject aims to invert this fault mode indirectly by integrating a single passive thermal auxiliary switch (i.e. irreversible) into the chip and connected in a particular manner to the main chip. Two ways are envisaged and will have to be explored during this post-doc:
- a monolithic integration by micro-electronics (clean room, ENS Paris Saclay),
- a hybrid integration (3DPHI platform, Toulouse).


The expected work of the postdoctoral researcher is based on architectural proposals, choices of materials and technological processes to evaluate and compare these two approaches. The recruited postdoctoral fellow will also have to invest in the implementation of the intermediate and final test structures in connection with a particular existing chip assembly pressed by metal foam, invented at Satie Lab during the thesis of Yoann Pascal (ANR project HIT-TEMS).


Micro-electronics and clean-room technologies, micro-technology and physics of material, hybrid power integration, technologies for integration into power electronics.

Work Context

ENS Paris Saclay - Cachan (until July 2019 then Plateau de Saclay) 2/3 of the time and Toulouse at 1/3 of the time

Constraints and risks

Geographical mobility (travel and accommodation financed).

We talk about it on Twitter!